CalmRISC16 Memory Mapped I/O
Base address of I/O is 0x3F0000
OffsetMnemonicDescriptionResetR/W
0x000PCON(speculation, unknown function)  
0x001SCCONOscillator control register00HR/W
0x002WTCONWatch timer control register00HR/W
0x003(not mapped)   
0x004BTCONBasic timer control register00HR/W
0x005BTCNTBasic timer counter00HR
0x006WDTENWatchdog timer enable register00HR/W
0x007WDTCONWatchdog timer control register00HR/W
0x008TACONTimer A control register00HR/W
0x009TAPRETimer A Pre-scalar registerFFHR/W
0x00aTADATAHTimer A data register high00HR/W
0x00bTADATALTimer A data register low00HR/W
0x00cTACNTHTimer A counter high?R
0x00dTACNTLTimer A counter low?R
0x00e(not mapped)   
0x00f(not mapped)   
0x010TBCONTimer B control register00HR/W
0x011TBPRETimer B Pre-scalar registerFFHR/W
0x012TBDATAHTimer B data register high00HR/W
0x013TBDATALTimer B data register low00HR/W
0x014TBCNTHTimer B counter high?R
0x015TBCNTLTimer B counter low?R
0x016(not mapped)   
0x017(not mapped)   
0x018TCCONTimer C control register00HR/W
0x019TCPRETimer C Pre-scalar registerFFHR/W
0x01aTCDATAHTimer C data register high00HR/W
0x01bTCDATALTimer C data register low00HR/W
0x01cTCCNTHTimer C counter high?R
0x01dTCCNTLTimer C counter low?R
0x01e(not mapped)   
0x01f(not mapped)   
0x020IRQ0HInterrupt request register 0 high?R/W
0x021IRQ0LInterrupt request register 0 low?R/W
0x022IMR0HInterrupt mask register 0 high00HR/W
0x023IMR0LInterrupt mask register 0 low00HR/W
0x024IPR0HInterrupt priority register 0 high00HR/W
0x025IPR0LInterrupt priority register 0 low00HR/W
0x026IIR0HInterrupt ID register 0 high?R/W
0x027(not mapped)   
0x028IRQ1HInterrupt request register 1 high?R/W
0x029IRQ1LInterrupt request register 1 low?R/W
0x02aIMR1HInterrupt mask register 1 high00HR/W
0x02bIMR1LInterrupt mask register 1 low00HR/W
0x02cIPR1HInterrupt priority register 1 high00HR/W
0x02dIPR1LInterrupt priority register 1 low00HR/W
0x02e(not mapped)   
0x02f(not mapped)   
0x030P0Port 0 data register00HR/W
0x031P1Port 1 data register00HR/W
0x032P2Port 2 data register00HR/W
0x033P3Port 3 data register00HR/W
0x034P4Port 4 data register00HR/W
0x035P5Port 5 data register00HR
0x036P6Port 6 data register00HR/W
0x037P7Port 7 data register00HR/W
0x038P8Port 8 data register00HR/W
0x039P9Port 9 data register00HR/W
0x03aP10Port 10 data register00HR/W
0x03b(not mapped)   
0x03c(not mapped)   
0x03d(not mapped)   
0x03e(not mapped)   
0x03f(not mapped)   
0x040P0CONPort 0 control register00HR/W
0x041P1CONPort 1 control register00HR/W
0x042P2CONHPort 2 control register high30HR/W
0x043P2CONLPort 2 control register low00HR/W
0x044P3CONHPort 3 control register high00HR/W
0x045P3CONLPort 3 control register low00HR/W
0x046P3PURPort 3 pull-up resistor00HR/W
0x047(not mapped)   
0x048P5CONPort 5 control register00HR/W
0x049P5PURPort 5 pull-up resistor00HR/W
0x04aP5INTMODHPort 5 Int. Mode register High00HR/W
0x04bP5INTMODLPort 5 Int. Mode register low00HR/W
0x04cP5INTCONPort 5 Int. control register00HR/W
0x04d(not mapped)   
0x04e(not mapped)   
0x04f(not mapped)   
0x050P4CONPort 4 control register00HR/W
0x051P4INTCONPort 4 Int. control register00HR/W
0x052P4INTMODPort 4 Int. Mode register00HR/W
0x053P6CONPort 6 control register00HR/W
0x054P7CONPort 7 control register00HR/W
0x055P8CONPort 8 control register00HR/W
0x056P9CONPort 9 control register00HR/W
0x057P10CONPort 10 control register00HR/W
0x058SMCONSmart Media control register00HR/W
0x059ECCNTECC counter00HR/W
0x05aECCHECC data register high00HR/W
0x05bECCLECC data register low00HR/W
0x05cECCXECC data register extension00HR/W
0x05dECCCLRECC clear register?W
0x05eECCRSTHECC result register high00HR/W
0x05fECCRSTLECC result register low00HR/W
0x060PPDATAParallel port data register00HR/W
0x061PPCDATAParallel port command data register00HR/W
0x062PPSCONParallel port status control register08HR/W
0x063PPSTATParallel port status register3FHR/W
0x064PPCONHParallel port control register high00HR/W
0x065PPCONLParallel port control register low00HR/W
0x066PPINTCONHParallel port int. control register high00HR/W
0x067PPINTCONLParallel port int. control register low00HR/W
0x068PPINTPNDHParallel port int. pending register high00HR/W
0x069PPINTPNDLParallel port int. pending register low00HR/W
0x06aPPACKDParallel port ack. width data registerxxHR/W
0x06bPPRLC(speculation, unknown function)  
0x06cPPFSM(speculation, unknown function)  
0x06d(not mapped)   
0x06e(not mapped)   
0x06f(not mapped)   
0x070SIOCONSerial I/O control register00HR/W
0x071SIOPSSerial I/O pre-scale register00HR/W
0x072SIODATASerial I/O data register00HR/W
0x073(not mapped)   
0x074ADDATAHA/D conversion result data register high?R
0x075ADDATALA/D conversion result data register low?R
0x076ADCONADC control register00HR/W
0x077(reserved)   
0x078(reserved)   
0x079(reserved)   
0x07a(reserved)   
0x07b(reserved)   
0x07c(reserved)   
0x07d(reserved)   
0x07e(reserved)   
0x07f(reserved)   
0x080FUNADDRFunction address register00HR
0x081PWRMANPower management register00HR
0x082FRAMELOFrame number LO register00HR
0x083FRAMEHIFrame number HI register00HR
0x084INTREGInterrupt pending register00HR/W
0x085INTENAInterrupt enable register00HR/W
0x086EPINDEXEndpoint index register00HR/W
0x087(not mapped)   
0x088(not mapped)   
0x089EPDIREndpoint direction register00HW
0x08aINCSRIN control status register00HR/W
0x08bOUTCSROUT control status register00HR/W
0x08cINMAXPIN MAX packet register00HR/W
0x08dOUTMAXPOUT MAX packet register00HR/W
0x08eWRTCNTLOWrite counter LO register00HR/W
0x08fWRTCNTHIWrite counter HI register00HR/W
0x090EP0FIFOEndpoint 0 FIFO register00HR/W
0x091EP1FIFOEndpoint 1 FIFO register00HR/W
0x092EP2FIFOEndpoint 2 FIFO register00HR/W
0x093EP3FIFOEndpoint 3 FIFO register00HR/W
0x094USB (hidden)Invisible area for USB  
0x095USB (hidden)Invisible area for USB  
0x096USB (hidden)Invisible area for USB  
0x097USB (hidden)Invisible area for USB  
0x098USB (hidden)Invisible area for USB  
0x099USB (hidden)Invisible area for USB  
0x09aUSB (hidden)Invisible area for USB  
0x09bUSB (hidden)Invisible area for USB  
0x09cUSB (hidden)Invisible area for USB  
0x09dUSB (hidden)Invisible area for USB  
0x09eUSB (hidden)Invisible area for USB  
0x09fUSB (hidden)Invisible area for USB  
0x0a0IISCON0IIS control register 000HR/W
0x0a1IISMODE0IIS mode register 000HR/W
0x0a2IISPTR0IIS buffer pointer register 000HR/W
0x0a3(not mapped)Location A3H is not mapped  
0x0a4IISCON1IIS control register 100HR/W
0x0a5IISMODE1IIS mode register 100HR/W
0x0a6IISPTR1IIS buffer pointer register 100HR/W
0x0a7(not mapped)   
0x0a8PLL0DATAHPLL0 data register higher?R/W
0x0a9PLL0DATALPLL0 data register lower?R/W
0x0aaPLL0CONPLL0 Control register0R/W
0x0ab(not mapped)   
0x0acPLL1DATAHPLL1 data register higher?R/W
0x0adPLL1DATALPLL1 data register lower?R/W
0x0aePLL1CONPLL1 Control register0R/W
0x0af(not mapped)   
0x0b0LCONUART line control register00HR/W
0x0b1UCONUART control register00HR/W
0x0b2USSRUART status registerC0HR
0x0b3TBRUART transmit buffer register?W
0x0b4RBRUART receive buffer register?R
0x0b5UBRDRUART baud rate divisor register00HR/W
0x0b6UPENDUART interrupt pending register0R/W
0x0b7(not mapped)   
0x0b8IICCONIIC control register00HR/W
0x0b9IICSRIIC status register00HR/W
0x0baIICDATAIIC data register?R/W
0x0bbIICADDRIIC address register?R/W
0x0bc(not mapped)IIC pre-scaler registerFFHR/W
0x0bdIICCNTIIC pre-scaler count register for test?R
0x0be(not mapped)   
0x0bf(not mapped)   
0x0c0IISBUF64 Byte IIS I/O Buffer?R/W
0x0c1IISBUF+0164 Byte IIS I/O Buffer?R/W
0x0c2IISBUF+0264 Byte IIS I/O Buffer?R/W
0x0c3IISBUF+0364 Byte IIS I/O Buffer?R/W
0x0c4IISBUF+0464 Byte IIS I/O Buffer?R/W
0x0c5IISBUF+0564 Byte IIS I/O Buffer?R/W
0x0c6IISBUF+0664 Byte IIS I/O Buffer?R/W
0x0c7IISBUF+0764 Byte IIS I/O Buffer?R/W
0x0c8IISBUF+0864 Byte IIS I/O Buffer?R/W
0x0c9IISBUF+0964 Byte IIS I/O Buffer?R/W
0x0caIISBUF+1064 Byte IIS I/O Buffer?R/W
0x0cbIISBUF+1164 Byte IIS I/O Buffer?R/W
0x0ccIISBUF+1264 Byte IIS I/O Buffer?R/W
0x0cdIISBUF+1364 Byte IIS I/O Buffer?R/W
0x0ceIISBUF+1464 Byte IIS I/O Buffer?R/W
0x0cfIISBUF+1564 Byte IIS I/O Buffer?R/W
0x0d0IISBUF+1664 Byte IIS I/O Buffer?R/W
0x0d1IISBUF+1764 Byte IIS I/O Buffer?R/W
0x0d2IISBUF+1864 Byte IIS I/O Buffer?R/W
0x0d3IISBUF+1964 Byte IIS I/O Buffer?R/W
0x0d4IISBUF+2064 Byte IIS I/O Buffer?R/W
0x0d5IISBUF+2164 Byte IIS I/O Buffer?R/W
0x0d6IISBUF+2264 Byte IIS I/O Buffer?R/W
0x0d7IISBUF+2364 Byte IIS I/O Buffer?R/W
0x0d8IISBUF+2464 Byte IIS I/O Buffer?R/W
0x0d9IISBUF+2564 Byte IIS I/O Buffer?R/W
0x0daIISBUF+2664 Byte IIS I/O Buffer?R/W
0x0dbIISBUF+2764 Byte IIS I/O Buffer?R/W
0x0dcIISBUF+2864 Byte IIS I/O Buffer?R/W
0x0ddIISBUF+2964 Byte IIS I/O Buffer?R/W
0x0deIISBUF+3064 Byte IIS I/O Buffer?R/W
0x0dfIISBUF+3164 Byte IIS I/O Buffer?R/W
0x0e0IISBUF+3264 Byte IIS I/O Buffer?R/W
0x0e1IISBUF+3364 Byte IIS I/O Buffer?R/W
0x0e2IISBUF+3464 Byte IIS I/O Buffer?R/W
0x0e3IISBUF+3564 Byte IIS I/O Buffer?R/W
0x0e4IISBUF+3664 Byte IIS I/O Buffer?R/W
0x0e5IISBUF+3764 Byte IIS I/O Buffer?R/W
0x0e6IISBUF+3864 Byte IIS I/O Buffer?R/W
0x0e7IISBUF+3964 Byte IIS I/O Buffer?R/W
0x0e8IISBUF+4064 Byte IIS I/O Buffer?R/W
0x0e9IISBUF+4164 Byte IIS I/O Buffer?R/W
0x0eaIISBUF+4264 Byte IIS I/O Buffer?R/W
0x0ebIISBUF+4364 Byte IIS I/O Buffer?R/W
0x0ecIISBUF+4464 Byte IIS I/O Buffer?R/W
0x0edIISBUF+4564 Byte IIS I/O Buffer?R/W
0x0eeIISBUF+4664 Byte IIS I/O Buffer?R/W
0x0efIISBUF+4764 Byte IIS I/O Buffer?R/W
0x0f0IISBUF+4864 Byte IIS I/O Buffer?R/W
0x0f1IISBUF+4964 Byte IIS I/O Buffer?R/W
0x0f2IISBUF+5064 Byte IIS I/O Buffer?R/W
0x0f3IISBUF+5164 Byte IIS I/O Buffer?R/W
0x0f4IISBUF+5264 Byte IIS I/O Buffer?R/W
0x0f5IISBUF+5364 Byte IIS I/O Buffer?R/W
0x0f6IISBUF+5464 Byte IIS I/O Buffer?R/W
0x0f7IISBUF+5564 Byte IIS I/O Buffer?R/W
0x0f8IISBUF+5664 Byte IIS I/O Buffer?R/W
0x0f9IISBUF+5764 Byte IIS I/O Buffer?R/W
0x0faIISBUF+5864 Byte IIS I/O Buffer?R/W
0x0fbIISBUF+5964 Byte IIS I/O Buffer?R/W
0x0fcIISBUF+6064 Byte IIS I/O Buffer?R/W
0x0fdIISBUF+6164 Byte IIS I/O Buffer?R/W
0x0feIISBUF+6264 Byte IIS I/O Buffer?R/W
0x0ffIISBUF+6364 Byte IIS I/O Buffer?R/W
0x100IDSC0HID/Security register 0 higher00HR/W
0x101IDSC0LID/Security register 0 lower?R/W
0x102IDSC1HID/Security register 1 higher?R/W
0x103IDSC1LID/Security register 1 lower?R/W
0x104IDSC2HID/Security register 2 higher?R/W
0x105IDSC2LID/Security register 2 lower?R/W
0x106IDSC3HID/Security register 3 higher?R/W
0x107IDSC3LID/Security register 3 lower?R/W
0x108RANCONControl register for Random number generator?R/W
0x109LFSR88-bit linear feedback shift register?R/W
0x10aLFSR16H16-bit linear feedback shift register higher?R/W
0x10bLFSR16L16-bit linear feedback shift register lower?R/W
0x10cINTMODEInterrupt Service Mode register00HR/W
0x10dFMCONI2S Frame Control  
0x10eFSCLKI2S Interface Clock  
0x10fFSDATI2S Interface Data  
0x110MIUSCFGSRAM Configure register00HR/W
0x111MIUDCOMSRAM Command register00HR/W
0x112MIUDCFGHSDRAM Configure register High00HR/W
0x113MIUDCFGLSDRAM Configure register Low00HR/W
0x114MIUDCNTHSDRAM Auto Refresh Count Value High7HR/W
0x115MIUDCNTLSDRAM Auto Refresh Count Value LowFFHR/W
0x116(not mapped)   
0x117(not mapped)   
0x118(not mapped)   
0x119(not mapped)   
0x11a(not mapped)   
0x11b(not mapped)   
0x11c(not mapped)   
0x11d(not mapped)   
0x11e(not mapped)   
0x11f(not mapped)   
0x120DDMACOMDDMA Command & Status register00HR/W
0x121DDMACFGDDMA Configure register00HR/W
0x122(not mapped)   
0x123DDMAIADRXDDMA Internal Address register eXt?R/W
0x124DDMAIADRHDDMA Internal Address register High?R/W
0x125DDMAIADRLDDMA Internal Address register Low?R/W
0x126(not mapped)   
0x127DDMAEADRXDDMA External Address register eXt?R/W
0x128DDMAEADRHDDMA External Address register High?R/W
0x129DDMAEADRLDDMA External Address register Low?R/W
0x12aDDMANUMHDDMA Transfer Number register High?R/W
0x12bDDMANUMLDDMA Transfer Number register Low?R/W
0x12cDDMACNTHDDMA Transfer Count register High00HR
0x12dDDMACNTLDDMA Transfer Count register Low00HR
0x12eDDMANUMXDDMA Transfer Number register eXt?R/W
0x12fDDMACNTXDDMA Transfer Count register eXt00HR
0x130YDMACOMYDMA Command & Status register00HR/W
0x131YDMACFGYDMA Configure register00HR/W
0x132YDMAIADRHYDMA Internal Address register High?R/W
0x133YDMAIADRHYDMA Internal Address register Low?R/W
0x134(not mapped)   
0x135YDMAEADRXYDMA External Address register eXt?R/W
0x136YDMAEADRHYDMA External Address register High?R/W
0x137YDMAEADRLYDMA External Address register Low?R/W
0x138YDMANUMHYDMA Transfer Number register High?R/W
0x139YDMANUMLYDMA Transfer Number register Low?R/W
0x13aYDMACNTHYDMA Transfer Count register High00HR
0x13bYDMACNTLYDMA Transfer Count register Low00HR
0x13c(not mapped)   
0x13d(not mapped)   
0x13e(not mapped)   
0x13f(not mapped)   
0x140CACHECONCACHE Control register00HR/W
0x141ICBASEHICACHE Base register High00HR/W
0x142ICBASELICACHE Base register Low00HR/W
0x143DCBASEHDCACHE Base register High00HR/W
0x144DCBASELDCACHE Base register Low00HR/W
0x145(not mapped)   
0x146(not mapped)   
0x147(not mapped)   
0x148(not mapped)   
0x149(not mapped)   
0x14a(not mapped)   
0x14b(not mapped)   
0x14c(not mapped)   
0x14d(not mapped)   
0x14e(not mapped)   
0x14f(not mapped)   
0x150LCNTR0HLCD Control register 0 High00HR/W
0x151LCNTR0LLCD Control register 0 Low00HR/W
0x152LCNTR1HLCD Control register 1 High00HR/W
0x153LCNTR1LLCD Control register 1 Low00HR/W
0x154LCNTR2HLCD Control register 2 High00HR/W
0x155LCNTR2LLCD Control register 2 Low00HR/W
0x156LCNTR3HLCD Control register 3 High00HR/W
0x157LCNTR3LLCD Control register 3 Low00HR/W
0x158LCNTR4HLCD Control register 4 High00HR/W
0x159LCNTR4LLCD Control register 4 Low00HR/W
0x15aLCNTR5HLCD Control register 5 High00HR/W
0x15bLCNTR5LLCD Control register 5 Low00HR/W
0x15c(not mapped)   
0x15dLDBAR1HLCD DMA Channel 1 Base address High00HR/W
0x15eLDBAR1MLCD DMA Channel 1 Base address Middle00HR/W
0x15fLDBAR1LLCD DMA Channel 1 Base address Low00HR/W
0x160(not mapped)   
0x161LDBAR2HLCD DMA Channel 2 Base address High00HR/W
0x162LDBAR2MLCD DMA Channel 2 Base address Middle00HR/W
0x163LDBAR2LLCD DMA Channel 2 Base address Low00HR/W
0x164(not mapped)   
0x165LDCAR1HLCD DMA Channel 1 Current address High00HR
0x166LDCAR1MLCD DMA Channel 1 Current address Middle00HR
0x167LDCAR1LLCD DMA Channel 1 Current address Low00HR
0x168(not mapped)   
0x169LDCAR2HLCD DMA Channel 2 Current address High00HR
0x16aLDCAR2MLCD DMA Channel 2 Current address Middle00HR
0x16bLDCAR2LLCD DMA Channel 2 Current address Low00HR
0x16c(not mapped)   
0x16dLSRLCD Status register00HR/W
0x16eLRLUTRHHLCD Red Lookup Table High-High00HR/W
0x16fLRLUTRHLLCD Red Lookup Table High-Low00HR/W
0x170LRLUTRLHLCD Red Lookup Table Low-High00HR/W
0x171LRLUTRLLLCD Red Lookup Table Low-Low00HR/W
0x172LGLUTRHHLCD Green Lookup Table High-High00HR/W
0x173LGLUTRHLLCD Green Lookup Table High-Low00HR/W
0x174LGLUTRLHLCD Green Lookup Table Low-High00HR/W
0x175LGLUTRLLLCD Green Lookup Table Low-Low00HR/W
0x176LBLUTRHLCD Blue Lookup Table Low-High00HR/W
0x177LBLUTRLLCD Blue Lookup Table Low-Low00HR/W
0x178LDP1_7LCD 1/7 Dither Pattern register00HR/W
0x179LDP3_7LCD 3/7 Dither Pattern register00HR/W
0x17aLDP4_7LCD 4/7 Dither Pattern register00HR/W
0x17bLDP5_7LCD 5/7 Dither Pattern register00HR/W
0x17cLDP6_7LCD 6/7 Dither Pattern register00HR/W
0x17d(not mapped)   
0x17eLDP1_5LCD 1/5 Dither Pattern register00HR/W
0x17fLDP2_5LCD 2/5 Dither Pattern register00HR/W
0x180LDP3_5LCD 3/5 Dither Pattern register00HR/W
0x181LDP4_5LCD 4/5 Dither Pattern register00HR/W
0x182LDP1_4LCD 1/4, 1/2 Dither Pattern register00HR/W
0x183LDP3_4LCD 3/4 Dither Pattern register00HR/W
0x184LDP1_3LCD 1/3, 2/3 Dither Pattern register00HR/W

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